000 04953nam a22005415i 4500
001 978-0-387-36495-7
003 DE-He213
005 20141014113430.0
007 cr nn 008mamaa
008 100301s2006 xxu| s |||| 0|eng d
020 _a9780387364957
_9978-0-387-36495-7
024 7 _a10.1007/0-387-36495-1
_2doi
041 _aeng
050 4 _aTK7888.4
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
082 0 4 _a621.3815
_223
100 1 _aSutherland, Stuart.
_eauthor.
245 1 0 _aSystemVerilog for Design
_h[electronic resource] :
_bA Guide to Using SystemVerilog for Hardware Design and Modeling /
_cby Stuart Sutherland, Simon Davidmann, Peter Flake.
250 _aSecond Edition.
260 1 _aBoston, MA :
_bSpringer US,
_c2006.
264 1 _aBoston, MA :
_bSpringer US,
_c2006.
300 _aXXX, 418 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
505 0 _ato SystemVerilog -- SystemVerilog Declaration Spaces -- SystemVerilog Literal Values and Built-in Data Types -- SystemVerilog User-Defined and Enumerated Types -- SystemVerilog Arrays, Structures and Unions -- SystemVerilog Procedural Blocks, Tasks and Functions -- SystemVerilog Procedural Statements -- Modeling Finite State Machines with SystemVerilog -- SystemVerilog Design Hierarchy -- SystemVerilog Interfaces -- A Complete Design Modeled with SystemVerilog -- Behavioral and Transaction Level Modeling.
520 _aSystemVerilog is a rich set of extensions to the Verilog Hardware Description Language (Verilog HDL). SystemVerilog for Design describes the correct usage of these extensions for modeling digital designs. These important extensions enable the representation of complex digital logic in concise, accurate, and reusable hardware models. All key SystemVerilog design features are presented, such as declaration spaces, two-state data types, enumerated types, user-defined types, structures, unions, interfaces, and RTL coding extensions. Emphasis is placed on the proper usage of these enhancements for simulation and synthesis. Design engineers, engineering managers and engineering students working with all sizes and types of digital designs, whether FPGA, ASIC or full custom, will find this book to be an invaluable learning tool and reference guide. The second edition of this book reflects the official IEEE 1800-2005 SystemVerilog standard. This IEEE SystemVerilog standard adds new capabilities, clarifications, and changes to the Accellera 3.1 SystemVerilog upon which the first edition of this book was based. Significant updates and revisions in the new edition include: A new chapter showing how to use SystemVerilog packages with single-file and multi-file compilers. - New code examples illustrating correct usage of the IEEE version of SystemVerilog. - Updated coding guidelines reflecting the capabilities of current simulator and synthesis Electronic Design Automation tools such as digital simulators and synthesis compilers. "SystemVerilog makes it easier to produce more efficient and concise descriptions of complex hardware designs. The authors of this book have been involved with the development of the language from the beginning, and who is better to learn from than those involved from day one?" — Greg Spirakis, Vice President of Design Technology Intel Corporation "Sun has been a driving force in SystemVerilog from its inception. SystemVerilog can significantly improve the productivity of designers in the coming years, and this book is a comprehensive reference text for engineers who want to learn about SystemVerilog for their next generation designs." — Sunil Joshi, Vice President of Software Technologies & Compute Resources Sun Microsystems, Inc. "SystemVerilog addresses the need for efficient and powerful modeling essential to support the complexity, size and scale of next generation hardware designs. This book explains how to use SystemVerilog effectively and provides numerous examples to illustrate how each of the language constructs can best be utilized." — Chris Malachowsky, Co-Founder and Vice President of Hardware NVIDIA Corp.
650 0 _aEngineering.
650 0 _aComputer hardware.
650 0 _aComputer aided design.
650 0 _aSystems engineering.
650 1 4 _aEngineering.
650 2 4 _aCircuits and Systems.
650 2 4 _aComputer-Aided Engineering (CAD, CAE) and Design.
650 2 4 _aComputer Hardware.
650 2 4 _aElectronic and Computer Engineering.
700 1 _aDavidmann, Simon.
_eauthor.
700 1 _aFlake, Peter.
_eauthor.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9780387333991
856 4 0 _uhttp://dx.doi.org/10.1007/0-387-36495-1
912 _aZDB-2-ENG
942 _cEB
999 _c654
_d654