The Designer's Guide to Jitter in Ring Oscillators [electronic resource] / by David Ricketts, John A. McNeill.

By: Ricketts, David [author.]Contributor(s): McNeill, John A [author.] | SpringerLink (Online service)Material type: TextTextLanguage: English Series: The Designer's Guide Book Series: Publisher: Boston, MA : Springer US, 2009Description: online resourceContent type: text Media type: computer Carrier type: online resourceISBN: 9780387765280Subject(s): Engineering | Computer engineering | Systems engineering | Engineering | Electrical Engineering | Circuits and SystemsAdditional physical formats: Printed edition:: No titleOnline resources: Click here to access online
Contents:
to oscillator jitter -- Classification of ring oscillators -- Phase-Locked Loop System Concepts -- Overview of Noise Analysis Fundamentals -- Measurement Techniques -- Analysis of jitter in ring oscillators -- Sources of jitter in ring oscillators -- Design methodology -- Low jitter VCO design examples.
In: Springer eBooksSummary: The Designer’s Guide to Jitter in Ring Oscillators provides information for engineers on designing voltage controlled oscillators (VCOs) and phase-locked loops (PLLs) for low jitter applications such as serial data communication and clock synthesis. The material is presented in a clear, intuitive fashion at both the system level and the circuit level to help designers improve their understanding of fundamental noise sources and design low jitter circuitry within power, area, and process constraints so that ultimate performance meets system level requirements. At the system level, the authors describe and specify different methods of measuring jitter to characterize time domain uncertainty. Although the emphasis is on time-domain measures of oscillator performance, a simple method of translating performance to frequency domain (phase noise) measures is also included. At the circuit level, the authors include techniques for design of low jitter delay elements for use in ring oscillators, as well as relating the circuit-level characteristics to system-level performance. The authors discuss a classification scheme for delay stages to help guide the designer’s choice with regard to signal type (single-ended vs. differential), output format (single phase vs. multiple phase), and tuning method. Simple mathematical expressions are developed describing the noise-power tradeoffs for each type of stage, so the designer can quickly estimate the power dissipation required to achieve a desired level of jitter. The Designer’s Guide to Jitter in Ring Oscillators is an excellent resource for engineers and researchers interested in jitter and ring oscillators and their application in communication systems.
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to oscillator jitter -- Classification of ring oscillators -- Phase-Locked Loop System Concepts -- Overview of Noise Analysis Fundamentals -- Measurement Techniques -- Analysis of jitter in ring oscillators -- Sources of jitter in ring oscillators -- Design methodology -- Low jitter VCO design examples.

The Designer’s Guide to Jitter in Ring Oscillators provides information for engineers on designing voltage controlled oscillators (VCOs) and phase-locked loops (PLLs) for low jitter applications such as serial data communication and clock synthesis. The material is presented in a clear, intuitive fashion at both the system level and the circuit level to help designers improve their understanding of fundamental noise sources and design low jitter circuitry within power, area, and process constraints so that ultimate performance meets system level requirements. At the system level, the authors describe and specify different methods of measuring jitter to characterize time domain uncertainty. Although the emphasis is on time-domain measures of oscillator performance, a simple method of translating performance to frequency domain (phase noise) measures is also included. At the circuit level, the authors include techniques for design of low jitter delay elements for use in ring oscillators, as well as relating the circuit-level characteristics to system-level performance. The authors discuss a classification scheme for delay stages to help guide the designer’s choice with regard to signal type (single-ended vs. differential), output format (single phase vs. multiple phase), and tuning method. Simple mathematical expressions are developed describing the noise-power tradeoffs for each type of stage, so the designer can quickly estimate the power dissipation required to achieve a desired level of jitter. The Designer’s Guide to Jitter in Ring Oscillators is an excellent resource for engineers and researchers interested in jitter and ring oscillators and their application in communication systems.

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