Digital Phase Lock Loops [electronic resource] : Architectures and Applications / by Saleh R. Al-araji, Zahir M. Hussain, Mahmoud A. Al-qutayri.

By: Al-araji, Saleh R [author.]Contributor(s): Hussain, Zahir M [author.] | Al-qutayri, Mahmoud A [author.] | SpringerLink (Online service)Material type: TextTextLanguage: English Publisher: Boston, MA : Springer US, 2006Description: XVII, 191 p. online resourceContent type: text Media type: computer Carrier type: online resourceISBN: 9780387328645Subject(s): Engineering | Computer engineering | Electronics | Telecommunication | Systems engineering | Engineering | Circuits and Systems | Electrical Engineering | Signal, Image and Speech Processing | Communications Engineering, Networks | Electronics and Microelectronics, InstrumentationAdditional physical formats: Printed edition:: No titleDDC classification: 621.3815 LOC classification: TK7888.4Online resources: Click here to access online
Contents:
General Review of Phase-Locked Loops -- Digital Phase Lock Loops -- The Time-Delay Digital Tanlock Loops (TDTLs) -- Hilbert Transformer and Time-Delay -- The Time-delay Digital Tanlock Loop in Noise -- Architectures for Improved Performance -- FPGA Reconfigurable TDTL -- Selected Applications.
In: Springer eBooksSummary: Digital phase lock loops are critical components of many communication, signal processing and control systems. This exciting new book covers various types of digital phase lock loops. It presents a comprehensive coverage of a new class of digital phase lock loops called the time delay tanlock loop (TDTL). It also details a number of architectures that improve the performance of the TDTL through adaptive techniques that overcome the conflicting requirements of the locking rage and speed of acquisition. These requirements are of paramount importance in many applications including wireless communications, consumer electronics and others. Digital Phase Lock Loops then illustrates the process of converting the TDTL class of digital phase lock loops for implementation on an FPGA-based reconfigurable system. These devices are being utilized in software-defined radio, DSP-based designs and many other communication and electronic systems to implement complex high-speed algorithms. Their flexibility and reconfigurability facilitate rapid prototyping, on-the-fly upgradeability, and code reuse with minimum effort and complexity. The practical real-time results, of the various TDTL architectures, obtained from the reconfigurable implementations are compared with those obtained through simulations with MATLAB/Simulink. The material in this book will be valuable to researchers, graduate students, and practicing engineers.
Tags from this library: No tags from this library for this title. Log in to add tags.
    Average rating: 0.0 (0 votes)
No physical items for this record

General Review of Phase-Locked Loops -- Digital Phase Lock Loops -- The Time-Delay Digital Tanlock Loops (TDTLs) -- Hilbert Transformer and Time-Delay -- The Time-delay Digital Tanlock Loop in Noise -- Architectures for Improved Performance -- FPGA Reconfigurable TDTL -- Selected Applications.

Digital phase lock loops are critical components of many communication, signal processing and control systems. This exciting new book covers various types of digital phase lock loops. It presents a comprehensive coverage of a new class of digital phase lock loops called the time delay tanlock loop (TDTL). It also details a number of architectures that improve the performance of the TDTL through adaptive techniques that overcome the conflicting requirements of the locking rage and speed of acquisition. These requirements are of paramount importance in many applications including wireless communications, consumer electronics and others. Digital Phase Lock Loops then illustrates the process of converting the TDTL class of digital phase lock loops for implementation on an FPGA-based reconfigurable system. These devices are being utilized in software-defined radio, DSP-based designs and many other communication and electronic systems to implement complex high-speed algorithms. Their flexibility and reconfigurability facilitate rapid prototyping, on-the-fly upgradeability, and code reuse with minimum effort and complexity. The practical real-time results, of the various TDTL architectures, obtained from the reconfigurable implementations are compared with those obtained through simulations with MATLAB/Simulink. The material in this book will be valuable to researchers, graduate students, and practicing engineers.

There are no comments on this title.

to post a comment.

Implemented and Maintained by Biju Patnaik Central Library.
For any Suggestions/Query Contact to library or Email: library@nitrkl.ac.in OR bpcl-cir@nitrkl.ac.in. Ph:91+6612462103
Website/OPAC best viewed in Mozilla Browser in 1366X768 Resolution.

Powered by Koha