Power-Aware Computer Systems [electronic resource] : Second International Workshop, PACS 2002 Cambridge, MA, USA, February 2, 2002 Revised Papers / edited by Babak Falsafi, T. N. Vijaykumar.

By: Falsafi, Babak [editor.]Contributor(s): Vijaykumar, T. N [editor.] | SpringerLink (Online service)Material type: TextTextLanguage: English Series: Lecture Notes in Computer Science: 2325Publisher: Berlin, Heidelberg : Springer Berlin Heidelberg, 2003Description: X, 226 p. online resourceContent type: text Media type: computer Carrier type: online resourceISBN: 9783540366126Subject(s): Computer science | Computer hardware | Computer network architectures | Operating systems (Computers) | Computer Science | Computer Systems Organization and Communication Networks | Computer Hardware | Operating Systems | Electronic and Computer EngineeringAdditional physical formats: Printed edition:: No titleDDC classification: 004.6 LOC classification: QA76.9.C643TK5105.5-5105.9Online resources: Click here to access online
Contents:
Power-Aware Architecture/Microarchitecture -- Early-Stage Definition of LPX: A Low Power Issue-Execute Processor -- Dynamic Tag-Check Omission: A Low Power Instruction Cache Architecture Exploiting Execution Footprints -- A Hardware Architecture for Dynamic Performance and Energy Adaptation -- Multi-Processor Computer System Having Low Power Consumption -- Power-Aware Real-Time Systems -- An Integrated Heuristic Approach to Power-Aware Real-Time Scheduling -- Power-Aware Task Motion for Enhancing Dynamic Range of Embedded Systems with Renewable Energy Sources -- A Low-Power Content-Adaptive Texture Mapping Architecture for Real-Time 3D Graphics -- Power Modeling and Monitoring -- Energy-Driven Statistical Sampling: Detecting Software Hotspots -- Modeling of DRAM Power Control Policies Using Deterministic and Stochastic Petri Nets -- SimDVS: An Integrated Simulation Environment for Performance Evaluation of Dynamic Voltage Scaling Algorithms -- Power-Aware OS and Compilers -- Application-Supported Device Management for Energy and Performance -- Energy-Efficient Server Clusters -- Single Region vs. Multiple Regions: A Comparison of Different Compiler-Directed Dynamic Voltage Scheduling Approaches.
In: Springer eBooksSummary: WelcometotheproceedingsofthePower-AwareComputerSystems(PACS2002) workshopheld in conjunction with the 8th InternationalSymposium on High PerformanceComputerArchitecture(HPCA-8). Improvementsincomputers- temperformancehavebeenaccompaniedbyanalarmingincreaseinpowerand energydissipation,leading tohigher costandlowerreliabilityinallcomputer systemsmarketsegments. Thehigherpower/energydissipationhasalsosign- icantlyreducedbatterylife inportablesystems. Whilecircuit-leveltechniques continuetoreducepowerandenergy,alllevelsofcomputersystemsarebeing usedtoaddresspowerandenergyissues. PACS2002wasthesecondworkshopin itsseriestoaddresspower-/energy-awarenessatalllevelsofcomputersystems andbroughttogetherexpertsfromacademiaandindustry. Theseproceedingsincluderesearchpapersspanningawidespectrumof- eas in power-aware systems. We have grouped the papers into the following categories:(1)power-awarearchitectureandmicroarchitecture,(2)power-aware real-time systems, (3) power modeling and monitoring, and (4) power-aware operatingsystemsandcompilers. The?rstgroupofpapersproposepower-awaretechniquesfortheprocessor pipeline using adaptiveresizing of power-hungrymicroarchitecturalstructures andclockgating,andpower-awarecachedesignbyavoidingtagchecksin- riodswhenthetagshavenotchanged. Thisgroupalsoincludesideastoadapt energyandperformancedynamicallybydetectingregionsofapplicationatr- timewherethesupplyvoltagemaybescaledtoreducepowerwithabounded decrease in performance. Lastly, a paper on multiprocessor designs trades o? computingcapacityandfunctionalityforimprovedenergypercyclebysched- ing simple tasks on low-end and low-energy processorsand complex tasks on high-endprocessors. Thesecondgroupofpaperstargetreal-timesystemsincludingideasonal- complexityheuristicwhichschedulesreal-timetaskssuchthatnotaskmissesits deadlineandthetotalenergysavingsaremaximized. Theotherpapersinthis group(1)tunethesystem-levelparallelismtothecurrent-levelofpower/energy availabilityandoptimizethesystempowerutilization,and(2)performadaptive texturemappinginreal-time3Dgraphicssystemsbasedonamodelofhuman visualperceptiontoachievesigni?cantpowersavingswithoutnoticeableimage qualitydegradation. Thethirdgroupofpapersfocusonpowermodelingandmonitoringincluding statisticalpro?lingtodetectsoftwarehotspotsofpower,andusingPetriNetsto modelDRAMpowerpolicies. Thisgroupalsoincludesasimulatorforevaluating theperformanceandpowerofdynamicvoltagescalingalgorithms. Thelast groupconcentratesonOS and compilersfor lowpower. The ?rst paperproposesapplication-issueddirectivestosetthepowermodesindevices suchasadiskdrive. Thesecondpaperproposespoliciesforcluster-widepower VI Preface management. Thepoliciesemploycombinationsofdynamicvoltagescalingand turningonando?toreduceoverallclusterpower. PACS2002wasahighlysuccessfulforumduetothehigh-qualitysubmissions, theenormouse?ortsoftheprogramcommitteeandthekeynotespeaker,andthe attendees. WewouldliketothankRonnyRonenforanexcellentkeynotespeech, showingthetechnologicalscalingtrendsandtheirimpactonenergy/powerc- sumption in general-purposemicroprocessors,and pinpointing recentmicro- chitecturalstrategiestoachievemorepower-e?cientmicroprocessors. Wewould like to also thank Antonio Gonzalez, Andreas Moshovos,John Kalamatianos, andothermembersoftheHPCA-8organizingcommitteewhohelpedarrange forlocalaccomodationandpublicizetheworkshop. February2002 BabakFalsa?andT. N. Vijaykumar PACS2002 Program Committee BabakFalsa?,CarnegieMellonUniversity(co-chair) T. N. Vijaykumar,PurdueUniversity(co-chair) DaveAlbonesi,UniversityofRochester KrsteAsanovic,MassachusettsInstituteofTechnology IrisBahar,BrownUniversity LucaBenini,UniversityofBologna DougCarmean,Intel Yuen Chan,IBM KeithFarkas,CompaqWRL MaryJaneIrwin,PennsylvaniaStateUniversity StefanosKaxiras,AgereSystems PeterKogge,UniversityofNotreDame UliKremer,RutgersUniversity AlvinLebeck,DukeUniversity AndreasMoshovos,UniversityofToronto RajRajkumar,CarnegieMellonUniversity KaushikRoy,PurdueUniversity Table of Contents Power-Aware Architecture/Microarchitecture Early-StageDe?nitionofLPX:ALowPowerIssue-ExecuteProcessor . . . . . . . 1 P. Bose,D. Brooks,A. Buyuktosunoglu,P. Cook,K. Das,P. Emma, M. Gschwind,H. Jacobson,T. Karkhanis,P. Kudva,S. Schuster, J. Smith,V. Srinivasan,V. Zyuban,D. Albonesi,andS. Dwarkadas DynamicTag-CheckOmission: ALowPowerInstructionCacheArchitecture ExploitingExecutionFootprints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 KojiInoue,VasilyMoshnyaga,andKazuakiMurakami AHardwareArchitecture forDynamicPerformanceandEnergyAdaptation. . . . . . . . . . . . . . . . . . . . . . . . . . 33 PhillipStanley-Marbell,MichaelS. Hsiao,andUlrichKremer Multi-processorComputerSystemHavingLowPowerConsumption . . . . . . . . 53 C. MichaelOlsenandL. AlexMorrow Power-Aware Real-TimeSystems AnIntegratedHeuristicApproach toPower-AwareReal-TimeScheduling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 PedroMejia,EugeneLevner,andDanielMoss´e Power-AwareTaskMotionforEnhancingDynamicRange ofEmbeddedSystemswithRenewableEnergySources . . . . . . . . . . . . . . . . . . . . . 84 JinfengLiu,PaiH. Chou,andNaderBagherzadeh ALow-PowerContent-AdaptiveTextureMappingArchitecture forReal-Time3DGraphics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 JeongseonEuh,JeevanChittamuru,andWayneBurleson Power Modelingand Monitoring Energy-DrivenStatisticalSampling:DetectingSoftwareHotspots . . . . . . . . . 110 FayChang,KeithI. Farkas,andParthasarathyRanganathan ModelingofDRAMPowerControlPolicies UsingDeterministicandStochasticPetriNets . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 XiaoboFan,CarlaS. Ellis,andAlvinR. Lebeck SimDVS:AnIntegratedSimulationEnvironment forPerformanceEvaluationofDynamicVoltageScalingAlgorithms . . . . . . .
Tags from this library: No tags from this library for this title. Log in to add tags.
    Average rating: 0.0 (0 votes)
No physical items for this record

Power-Aware Architecture/Microarchitecture -- Early-Stage Definition of LPX: A Low Power Issue-Execute Processor -- Dynamic Tag-Check Omission: A Low Power Instruction Cache Architecture Exploiting Execution Footprints -- A Hardware Architecture for Dynamic Performance and Energy Adaptation -- Multi-Processor Computer System Having Low Power Consumption -- Power-Aware Real-Time Systems -- An Integrated Heuristic Approach to Power-Aware Real-Time Scheduling -- Power-Aware Task Motion for Enhancing Dynamic Range of Embedded Systems with Renewable Energy Sources -- A Low-Power Content-Adaptive Texture Mapping Architecture for Real-Time 3D Graphics -- Power Modeling and Monitoring -- Energy-Driven Statistical Sampling: Detecting Software Hotspots -- Modeling of DRAM Power Control Policies Using Deterministic and Stochastic Petri Nets -- SimDVS: An Integrated Simulation Environment for Performance Evaluation of Dynamic Voltage Scaling Algorithms -- Power-Aware OS and Compilers -- Application-Supported Device Management for Energy and Performance -- Energy-Efficient Server Clusters -- Single Region vs. Multiple Regions: A Comparison of Different Compiler-Directed Dynamic Voltage Scheduling Approaches.

WelcometotheproceedingsofthePower-AwareComputerSystems(PACS2002) workshopheld in conjunction with the 8th InternationalSymposium on High PerformanceComputerArchitecture(HPCA-8). Improvementsincomputers- temperformancehavebeenaccompaniedbyanalarmingincreaseinpowerand energydissipation,leading tohigher costandlowerreliabilityinallcomputer systemsmarketsegments. Thehigherpower/energydissipationhasalsosign- icantlyreducedbatterylife inportablesystems. Whilecircuit-leveltechniques continuetoreducepowerandenergy,alllevelsofcomputersystemsarebeing usedtoaddresspowerandenergyissues. PACS2002wasthesecondworkshopin itsseriestoaddresspower-/energy-awarenessatalllevelsofcomputersystems andbroughttogetherexpertsfromacademiaandindustry. Theseproceedingsincluderesearchpapersspanningawidespectrumof- eas in power-aware systems. We have grouped the papers into the following categories:(1)power-awarearchitectureandmicroarchitecture,(2)power-aware real-time systems, (3) power modeling and monitoring, and (4) power-aware operatingsystemsandcompilers. The?rstgroupofpapersproposepower-awaretechniquesfortheprocessor pipeline using adaptiveresizing of power-hungrymicroarchitecturalstructures andclockgating,andpower-awarecachedesignbyavoidingtagchecksin- riodswhenthetagshavenotchanged. Thisgroupalsoincludesideastoadapt energyandperformancedynamicallybydetectingregionsofapplicationatr- timewherethesupplyvoltagemaybescaledtoreducepowerwithabounded decrease in performance. Lastly, a paper on multiprocessor designs trades o? computingcapacityandfunctionalityforimprovedenergypercyclebysched- ing simple tasks on low-end and low-energy processorsand complex tasks on high-endprocessors. Thesecondgroupofpaperstargetreal-timesystemsincludingideasonal- complexityheuristicwhichschedulesreal-timetaskssuchthatnotaskmissesits deadlineandthetotalenergysavingsaremaximized. Theotherpapersinthis group(1)tunethesystem-levelparallelismtothecurrent-levelofpower/energy availabilityandoptimizethesystempowerutilization,and(2)performadaptive texturemappinginreal-time3Dgraphicssystemsbasedonamodelofhuman visualperceptiontoachievesigni?cantpowersavingswithoutnoticeableimage qualitydegradation. Thethirdgroupofpapersfocusonpowermodelingandmonitoringincluding statisticalpro?lingtodetectsoftwarehotspotsofpower,andusingPetriNetsto modelDRAMpowerpolicies. Thisgroupalsoincludesasimulatorforevaluating theperformanceandpowerofdynamicvoltagescalingalgorithms. Thelast groupconcentratesonOS and compilersfor lowpower. The ?rst paperproposesapplication-issueddirectivestosetthepowermodesindevices suchasadiskdrive. Thesecondpaperproposespoliciesforcluster-widepower VI Preface management. Thepoliciesemploycombinationsofdynamicvoltagescalingand turningonando?toreduceoverallclusterpower. PACS2002wasahighlysuccessfulforumduetothehigh-qualitysubmissions, theenormouse?ortsoftheprogramcommitteeandthekeynotespeaker,andthe attendees. WewouldliketothankRonnyRonenforanexcellentkeynotespeech, showingthetechnologicalscalingtrendsandtheirimpactonenergy/powerc- sumption in general-purposemicroprocessors,and pinpointing recentmicro- chitecturalstrategiestoachievemorepower-e?cientmicroprocessors. Wewould like to also thank Antonio Gonzalez, Andreas Moshovos,John Kalamatianos, andothermembersoftheHPCA-8organizingcommitteewhohelpedarrange forlocalaccomodationandpublicizetheworkshop. February2002 BabakFalsa?andT. N. Vijaykumar PACS2002 Program Committee BabakFalsa?,CarnegieMellonUniversity(co-chair) T. N. Vijaykumar,PurdueUniversity(co-chair) DaveAlbonesi,UniversityofRochester KrsteAsanovic,MassachusettsInstituteofTechnology IrisBahar,BrownUniversity LucaBenini,UniversityofBologna DougCarmean,Intel Yuen Chan,IBM KeithFarkas,CompaqWRL MaryJaneIrwin,PennsylvaniaStateUniversity StefanosKaxiras,AgereSystems PeterKogge,UniversityofNotreDame UliKremer,RutgersUniversity AlvinLebeck,DukeUniversity AndreasMoshovos,UniversityofToronto RajRajkumar,CarnegieMellonUniversity KaushikRoy,PurdueUniversity Table of Contents Power-Aware Architecture/Microarchitecture Early-StageDe?nitionofLPX:ALowPowerIssue-ExecuteProcessor . . . . . . . 1 P. Bose,D. Brooks,A. Buyuktosunoglu,P. Cook,K. Das,P. Emma, M. Gschwind,H. Jacobson,T. Karkhanis,P. Kudva,S. Schuster, J. Smith,V. Srinivasan,V. Zyuban,D. Albonesi,andS. Dwarkadas DynamicTag-CheckOmission: ALowPowerInstructionCacheArchitecture ExploitingExecutionFootprints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 KojiInoue,VasilyMoshnyaga,andKazuakiMurakami AHardwareArchitecture forDynamicPerformanceandEnergyAdaptation. . . . . . . . . . . . . . . . . . . . . . . . . . 33 PhillipStanley-Marbell,MichaelS. Hsiao,andUlrichKremer Multi-processorComputerSystemHavingLowPowerConsumption . . . . . . . . 53 C. MichaelOlsenandL. AlexMorrow Power-Aware Real-TimeSystems AnIntegratedHeuristicApproach toPower-AwareReal-TimeScheduling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 PedroMejia,EugeneLevner,andDanielMoss´e Power-AwareTaskMotionforEnhancingDynamicRange ofEmbeddedSystemswithRenewableEnergySources . . . . . . . . . . . . . . . . . . . . . 84 JinfengLiu,PaiH. Chou,andNaderBagherzadeh ALow-PowerContent-AdaptiveTextureMappingArchitecture forReal-Time3DGraphics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 JeongseonEuh,JeevanChittamuru,andWayneBurleson Power Modelingand Monitoring Energy-DrivenStatisticalSampling:DetectingSoftwareHotspots . . . . . . . . . 110 FayChang,KeithI. Farkas,andParthasarathyRanganathan ModelingofDRAMPowerControlPolicies UsingDeterministicandStochasticPetriNets . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 XiaoboFan,CarlaS. Ellis,andAlvinR. Lebeck SimDVS:AnIntegratedSimulationEnvironment forPerformanceEvaluationofDynamicVoltageScalingAlgorithms . . . . . . .

There are no comments on this title.

to post a comment.

Implemented and Maintained by Biju Patnaik Central Library.
For any Suggestions/Query Contact to library or Email: library@nitrkl.ac.in OR bpcl-cir@nitrkl.ac.in. Ph:91+6612462103
Website/OPAC best viewed in Mozilla Browser in 1366X768 Resolution.

Powered by Koha