Multiprocessor System-on-Chip [electronic resource] : Hardware Design and Tool Integration / edited by Michael Hübner, Jürgen Becker.

By: Hübner, Michael [editor.]Contributor(s): Becker, Jürgen [editor.] | SpringerLink (Online service)Material type: TextTextLanguage: English Publisher: New York, NY : Springer New York, 2011Description: X, 300p. 100 illus. online resourceContent type: text Media type: computer Carrier type: online resourceISBN: 9781441964601Subject(s): Engineering | Computer aided design | Systems engineering | Engineering | Circuits and Systems | Computer-Aided Engineering (CAD, CAE) and DesignAdditional physical formats: Printed edition:: No titleDDC classification: 621.3815 LOC classification: TK7888.4Online resources: Click here to access online In: Springer eBooksSummary: Improving future electronic system performance can only be achieved by exploiting parallelism on all system levels. Multicore architectures offer a better performance/Watt ratio than single core architectures with similar performance. Combining multicore and coprocessor technology promises extreme computing power for highly CPU-time-consuming applications. FPGA-based accelerators not only offer the opportunity to speed up an application by implementing their compute-intensive kernels into hardware, but also to adapt to the dynamical behavior of an application. This book describes strategies for future system design in multiprocessor system-on-chip (MPSoC) architectures. Both hardware design and integration of new development tools are discussed. Novel trends in MPSoC design, combined with reconfigurable architectures are a main topic of concern. The main emphasis is on architectures, design-flow, tool-development, applications and system design. This book deals with key issues such as on-chip communication architectures, integration of reconfigurable hardware, and physical design of multiprocessor systems. •Provides a state-of-the-art overview of system design using MPSoC architectures; •Describes current trends in on-chip communication architectures; •Offers extensive coverage of system design integrating MPSoC architectures with reconfigurable hardware; •Includes coverage of challenges in physical design for multi- and manycore hardware architectures.
Tags from this library: No tags from this library for this title. Log in to add tags.
    Average rating: 0.0 (0 votes)
No physical items for this record

Improving future electronic system performance can only be achieved by exploiting parallelism on all system levels. Multicore architectures offer a better performance/Watt ratio than single core architectures with similar performance. Combining multicore and coprocessor technology promises extreme computing power for highly CPU-time-consuming applications. FPGA-based accelerators not only offer the opportunity to speed up an application by implementing their compute-intensive kernels into hardware, but also to adapt to the dynamical behavior of an application. This book describes strategies for future system design in multiprocessor system-on-chip (MPSoC) architectures. Both hardware design and integration of new development tools are discussed. Novel trends in MPSoC design, combined with reconfigurable architectures are a main topic of concern. The main emphasis is on architectures, design-flow, tool-development, applications and system design. This book deals with key issues such as on-chip communication architectures, integration of reconfigurable hardware, and physical design of multiprocessor systems. •Provides a state-of-the-art overview of system design using MPSoC architectures; •Describes current trends in on-chip communication architectures; •Offers extensive coverage of system design integrating MPSoC architectures with reconfigurable hardware; •Includes coverage of challenges in physical design for multi- and manycore hardware architectures.

There are no comments on this title.

to post a comment.

Implemented and Maintained by Biju Patnaik Central Library.
For any Suggestions/Query Contact to library or Email: library@nitrkl.ac.in OR bpcl-cir@nitrkl.ac.in. Ph:91+6612462103
Website/OPAC best viewed in Mozilla Browser in 1366X768 Resolution.

Powered by Koha