Low-power design of nanometer FPGAs (Record no. 77)

000 -LEADER
fixed length control field 04300cam a2200649Ia 4500
001 - CONTROL NUMBER
control field ocn459953620
003 - CONTROL NUMBER IDENTIFIER
control field OCoLC
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20140426153706.0
006 - FIXED-LENGTH DATA ELEMENTS--ADDITIONAL MATERIAL CHARACTERISTICS--GENERAL INFORMATION
fixed length control field m o d
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
fixed length control field cr cnu---unuuu
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 091027s2010 ne a ob 001 0 eng d
040 ## - CATALOGING SOURCE
Original cataloging agency OPELS
Language of cataloging eng
Transcribing agency OPELS
Modifying agency OPELS
-- N$T
-- STF
-- OCLCQ
-- EBLCP
-- IDEBK
-- OCLCA
-- OCLCQ
-- OPELS
-- OCLCQ
-- YDXCP
-- OCLCQ
-- CDX
-- OCLCQ
019 ## -
-- 515539610
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9780080922348 (electronic bk.)
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 0080922341 (electronic bk.)
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
Cancelled/invalid ISBN 9780123744388
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 0123744385 (hbk.)
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9780123744388 (hbk.)
029 1# - (OCLC)
OCLC library identifier DEBBG
System control number BV039828780
029 1# - (OCLC)
OCLC library identifier CDX
System control number 11510725
035 ## - SYSTEM CONTROL NUMBER
System control number (OCoLC)459953620
Canceled/invalid control number (OCoLC)515539610
037 ## - SOURCE OF ACQUISITION
Stock number 238148
Source of stock number/acquisition MIL
050 #4 - LIBRARY OF CONGRESS CALL NUMBER
Classification number TK7895.G36
Item number H37 2010eb
072 #7 - SUBJECT CATEGORY CODE
Subject category code TEC
Subject category code subdivision 008050
Source bisacsh
072 #7 - SUBJECT CATEGORY CODE
Subject category code TEC
Subject category code subdivision 008030
Source bisacsh
072 #7 - SUBJECT CATEGORY CODE
Subject category code COM
Subject category code subdivision 036000
Source bisacsh
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.395
Edition number 22
049 ## - LOCAL HOLDINGS (OCLC)
Holding library NTRA
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Hassan, Hassan,
Dates associated with a name 1979-
245 10 - TITLE STATEMENT
Title Low-power design of nanometer FPGAs
Medium [electronic resource] :
Remainder of title architecture and EDA /
Statement of responsibility, etc by Hassan Hassan, Mohab Anis.
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication, distribution, etc Amsterdam ;
-- Boston :
Name of publisher, distributor, etc Elsevier ;
Place of publication, distribution, etc Burlington, MA :
Name of publisher, distributor, etc Morgan Kaufmann,
Date of publication, distribution, etc c2010.
300 ## - PHYSICAL DESCRIPTION
Extent 1 online resource (xiv, 241 p.) :
Other physical details ill.
490 1# - SERIES STATEMENT
Series statement Systems on silicon
504 ## - BIBLIOGRAPHY, ETC. NOTE
Bibliography, etc Includes bibliographical references (p. 221-235) and index.
520 ## - SUMMARY, ETC.
Summary, etc Field Programmable Gate Arrays (FPGAs) have become very popular as embedded components on computing platforms. An FPGA is a viable, reprogrammable design approach that provides a fast time-to-market alternative to Application Specific Integrated Circuits (ASICs). Since FPGA implementations can be customized to fit for any application, their versatility leads to performance gains, and enables reuse of expensive silicon. Although high performance can be achieved in FPGAs, their high levels of power consumption pose a critical design challenge. This book will be an invaluable reference for researchers and practicing engineers concerned with power-efficient, FPGA design. State-of-the-art power reduction techniques for FPGAs will be described and compared. These techniques will be applied at the circuit, architecture, and electronic design automation levels to describe both the dynamic and leakage power sources and enable strategies for codesign. Design perspective on low-power FPGAs ... low-power techniques presented at key FPGA design levels for circuits, architectures, and electronic design automation, form critical, "bridge" guidelines for codesign; Low-leakage design in FPGAs ... comprehensive review of leakage-tolerant techniques empowers designers to minimize power dissipation; FPGA power estimation techniques ... provides valuable tools for estimating power efficiency/savings of current, low-power FPGA design techniques.
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note FPGA Architectures -- Power Consumption in Nanometer FPGAs -- Power Modeling and Estimation Techniques in FPGAs -- Dynamic Power Reduction -- Leakage Power Reduction -- Low-Power FPGA Design in Future CMOS Technologies.
588 ## -
-- Description based on print version record.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Field programmable gate arrays
General subdivision Computer-aided design.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Nanoelectromechanical systems
General subdivision Computer-aided design.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Low voltage integrated circuits
General subdivision Computer-aided design.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Integrated circuits
General subdivision Very large scale integration.
650 #7 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element TECHNOLOGY & ENGINEERING
General subdivision Electronics
-- Circuits
-- VLSI & ULSI.
Source of heading or term bisacsh
650 #7 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element TECHNOLOGY & ENGINEERING
General subdivision Electronics
-- Circuits
-- Logic.
Source of heading or term bisacsh
650 #7 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element COMPUTERS
General subdivision Logic Design.
Source of heading or term bisacsh
655 #4 - INDEX TERM--GENRE/FORM
Genre/form data or focus term Electronic books.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Anis, Mohab.
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Print version:
Main entry heading Hassan, Hassan A., 1979-
Title Low-power design of nanometer FPGAs.
Place, publisher, and date of publication Burlington, MA : Morgan Kaufmann, c2010
International Standard Book Number 9780123744388
Record control number (OCoLC)184827815
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
Uniform title Morgan Kaufmann series in systems on silicon.
856 40 - ELECTRONIC LOCATION AND ACCESS
Materials specified ScienceDirect
Uniform Resource Identifier http://www.sciencedirect.com/science/book/9780123744388
938 ## -
-- EBL - Ebook Library
-- EBLB
-- EBL477368
938 ## -
-- YBP Library Services
-- YANK
-- 3069150
938 ## -
-- EBSCOhost
-- EBSC
-- 248998
938 ## -
-- Coutts Information Services
-- COUT
-- 11510725
938 ## -
-- Ingram Digital eBook Collection
-- IDEB
-- 238148
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type E-Books
994 ## -
-- 92
-- NITR

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