Functional Verification of Programmable Embedded Architectures (Record no. 567)

000 -LEADER
fixed length control field 03603nam a22005655i 4500
001 - CONTROL NUMBER
control field 978-0-387-26399-1
003 - CONTROL NUMBER IDENTIFIER
control field DE-He213
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20141014113428.0
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
fixed length control field cr nn 008mamaa
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 100301s2005 xxu| s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9780387263991
-- 978-0-387-26399-1
024 7# - OTHER STANDARD IDENTIFIER
Standard number or code 10.1007/b137514
Source of number or code doi
041 ## - LANGUAGE CODE
Language code of text/sound track or separate title eng
050 #4 - LIBRARY OF CONGRESS CALL NUMBER
Classification number TK7888.4
072 #7 - SUBJECT CATEGORY CODE
Subject category code TJFC
Source bicssc
072 #7 - SUBJECT CATEGORY CODE
Subject category code TEC008010
Source bisacsh
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.3815
Edition number 23
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Mishra, Prabhat.
Relator term author.
245 10 - TITLE STATEMENT
Title Functional Verification of Programmable Embedded Architectures
Medium [electronic resource] :
Remainder of title A Top-Down Approach /
Statement of responsibility, etc by Prabhat Mishra, Nikil D. Dutt.
260 #1 - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication, distribution, etc Boston, MA :
Name of publisher, distributor, etc Springer US,
Date of publication, distribution, etc 2005.
264 #1 -
-- Boston, MA :
-- Springer US,
-- 2005.
300 ## - PHYSICAL DESCRIPTION
Extent XIX, 180 p.
Other physical details online resource.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note to Functional Verification -- Architecture Specification -- Architecture Specification -- Validation of Specification -- Top-Down Validation -- Executable Model Generation -- Design Validation -- Functional Test Generation -- Future Directions -- Conclusions.
520 ## - SUMMARY, ETC.
Summary, etc Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current System-on-Chip design methodology. A critical challenge in validation of such systems is the lack of a golden reference model. As a result, many existing validation techniques employ a bottom-up approach to design verification, where the functionality of an existing architecture is, in essence, reverse-engineered from its implementation. Traditional validation techniques employ different reference models depending on the abstraction level and verification task, resulting in potential inconsistencies between multiple reference models. This book presents a top-down validation methodology that complements the existing bottom-up approaches. It leverages the system architect’s knowledge about the behavior of the design through architecture specification using an Architecture Description Language (ADL). The authors also address two fundamental challenges in functional verification: lack of a golden reference model, and lack of a comprehensive functional coverage metric. Functional Verification of Programmable Embedded Architectures: A Top-Down Approach is designed for students, researchers, CAD tool developers, designers, and managers interested in the development of tools, techniques and methodologies for system-level design, microprocessor validation, design space exploration and functional verification of embedded systems.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Engineering.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer science.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Software engineering.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer system performance.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer aided design.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Systems engineering.
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Engineering.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Processor Architectures.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Special Purpose and Application-Based Systems.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer-Aided Engineering (CAD, CAE) and Design.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element System Performance and Evaluation.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Electronic and Computer Engineering.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Dutt, Nikil D.
Relator term author.
710 2# - ADDED ENTRY--CORPORATE NAME
Corporate name or jurisdiction name as entry element SpringerLink (Online service)
773 0# - HOST ITEM ENTRY
Title Springer eBooks
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9780387261430
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/b137514
912 ## -
-- ZDB-2-ENG
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type E-Books

No items available.


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