Reconfigurable Computing [electronic resource] : Accelerating Computation with Field-Programmable Gate Arrays / by Maya Gokhale, Paul S. Graham.

By: Gokhale, Maya [author.]Contributor(s): Graham, Paul S [author.] | SpringerLink (Online service)Material type: TextTextLanguage: English Publisher: Boston, MA : Springer US, 2005Description: X, 238 p. online resourceContent type: text Media type: computer Carrier type: online resourceISBN: 9780387261065Subject(s): Engineering | Computer science | Engineering mathematics | Engineering design | Systems engineering | Engineering | Circuits and Systems | Mathematical Logic and Formal Languages | Appl.Mathematics/Computational Methods of Engineering | Engineering Design | Programming Techniques | Electronic and Computer EngineeringAdditional physical formats: Printed edition:: No titleDDC classification: 621.3815 LOC classification: TK7888.4Online resources: Click here to access online
Contents:
An Introduction to Reconfigurable Computing. What is RC? RC Architectures. How did RC originate? Inside the FPGA. Mapping Algorithms to Hardware. RC Applications. Example: Dot Product. Further Reading -- Reconfigurable Logic Devices. Field-Programmable Gate Arrays. Coarse-Grained Reconfigurable Arrays. Summary -- Reconfigurable Computing Systems. Parallel Processing on Reconfigurable Computers. A Survey of Reconfigurable Computing Systems. Summary -- Languages and Compilation. Design Cycle. Languages. High Level Compilation. Low Level Design Flow. Debugging Reconfigurable Computing Applications. Summary -- Signal Processing Applications. What is Digital Signal Processing? Why Use Reconfigurable Computing for DSP? DSP Application Building Blocks. Example DSP Applications -- Image Processing. RC for Image and Video Processing. Local Neighborhood Functions. Convolution. Morphology. Feature Extraction. Automatic Target Recognition. Image Matching. Evolutionary Image Processing. Summary -- Network Security. Cryptographic Applications. Network Protocol Security. Summary -- Bioinformatics Applications. Introduction. Applications. Dynamic Programming Algorithms. Seed-Based Heuristics. Profiles, HMMs and Language Models. Bioinformatics FPGA Accelerators. Summary -- Supercomputing Applications. Introduction. Monte Carlo Simulation of Radiative Heat Transfer. Urban Road Traffic Simulation.
In: Springer eBooksSummary: placedintohardware. Thismethodologyismoste?ectivewhentheapplication shows “90/10” behavior – 90% of execution time in 10% of the code. By placing such compute intensive blocks in hardware, the NAPA could achieve 1–2 orders of magnitude performance improvement over DSP processors. TBT System ToggleBus Port Tranceiver ALP CR32 RPC Compact RISC Reconfigurable 32 Bit Processor Pipeline Cntlr Adaptive Logic CIO Processor External XMC Configurable Extended Memory I/O Controller PMA Memory Pipeline Interface Memory Array CR32 SMA Scratchpad Peripheral Memory Array Devices Fig. 3. 14. NAPA 1000 Following these research proposals, commercial FPGA vendors began - fering embedded processors in their FPGA product lines. The Triscend chip was one of the ?rst such products, with an 8-bit microcontroller. More - cently, Altera produced the Excalibur chip with an embedded ARM, and Xilinx followed with embedded PowerPC processors. Stretch, Inc. proposes a OneChip-like architecture in which the con?gurable logic shares register ?les with a Tensilica processor. 3. 3 Summary Recon?gurable logic has found its way into virtually every part of the parallel processing hierarchy. Millions of system gates are available for Instructi- level parallelism within the recon?gurable fabric. By sharing registers or - ternal busses with a conventional microprocessor, co-processor performance is even more accelerated through low latency, high bandwidth communication 50 3 Recon?gurable Computing Systems between processor and recon?gurable logic. In the I/O model, an FPGA - ray can process large granularity compute- and/or data-intensive tasks for the processor.
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An Introduction to Reconfigurable Computing. What is RC? RC Architectures. How did RC originate? Inside the FPGA. Mapping Algorithms to Hardware. RC Applications. Example: Dot Product. Further Reading -- Reconfigurable Logic Devices. Field-Programmable Gate Arrays. Coarse-Grained Reconfigurable Arrays. Summary -- Reconfigurable Computing Systems. Parallel Processing on Reconfigurable Computers. A Survey of Reconfigurable Computing Systems. Summary -- Languages and Compilation. Design Cycle. Languages. High Level Compilation. Low Level Design Flow. Debugging Reconfigurable Computing Applications. Summary -- Signal Processing Applications. What is Digital Signal Processing? Why Use Reconfigurable Computing for DSP? DSP Application Building Blocks. Example DSP Applications -- Image Processing. RC for Image and Video Processing. Local Neighborhood Functions. Convolution. Morphology. Feature Extraction. Automatic Target Recognition. Image Matching. Evolutionary Image Processing. Summary -- Network Security. Cryptographic Applications. Network Protocol Security. Summary -- Bioinformatics Applications. Introduction. Applications. Dynamic Programming Algorithms. Seed-Based Heuristics. Profiles, HMMs and Language Models. Bioinformatics FPGA Accelerators. Summary -- Supercomputing Applications. Introduction. Monte Carlo Simulation of Radiative Heat Transfer. Urban Road Traffic Simulation.

placedintohardware. Thismethodologyismoste?ectivewhentheapplication shows “90/10” behavior – 90% of execution time in 10% of the code. By placing such compute intensive blocks in hardware, the NAPA could achieve 1–2 orders of magnitude performance improvement over DSP processors. TBT System ToggleBus Port Tranceiver ALP CR32 RPC Compact RISC Reconfigurable 32 Bit Processor Pipeline Cntlr Adaptive Logic CIO Processor External XMC Configurable Extended Memory I/O Controller PMA Memory Pipeline Interface Memory Array CR32 SMA Scratchpad Peripheral Memory Array Devices Fig. 3. 14. NAPA 1000 Following these research proposals, commercial FPGA vendors began - fering embedded processors in their FPGA product lines. The Triscend chip was one of the ?rst such products, with an 8-bit microcontroller. More - cently, Altera produced the Excalibur chip with an embedded ARM, and Xilinx followed with embedded PowerPC processors. Stretch, Inc. proposes a OneChip-like architecture in which the con?gurable logic shares register ?les with a Tensilica processor. 3. 3 Summary Recon?gurable logic has found its way into virtually every part of the parallel processing hierarchy. Millions of system gates are available for Instructi- level parallelism within the recon?gurable fabric. By sharing registers or - ternal busses with a conventional microprocessor, co-processor performance is even more accelerated through low latency, high bandwidth communication 50 3 Recon?gurable Computing Systems between processor and recon?gurable logic. In the I/O model, an FPGA - ray can process large granularity compute- and/or data-intensive tasks for the processor.

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