CMOS PLL Synthesizers: Analysis and Design [electronic resource] / by Keliu Shu, Edgar Sánchez-Sinencio.

By: Shu, Keliu [author.]Contributor(s): Sánchez-Sinencio, Edgar [author.] | SpringerLink (Online service)Material type: TextTextLanguage: English Series: The International Series in Engineering and Computer Science, Analog Circuits and Signal Processing: 783Publisher: Boston, MA : Springer US, 2005Description: XVI, 215 p. online resourceContent type: text Media type: computer Carrier type: online resourceISBN: 9780387236698Subject(s): Engineering | Engineering | Electronic and Computer EngineeringAdditional physical formats: Printed edition:: No titleDDC classification: 621.3 LOC classification: TK1-9971Online resources: Click here to access online
Contents:
Frequency Synthesizer for Wireless Applications -- PLL Frequency Synthesizer -- ?? Fractional-N PLL Synthesizer -- Enhanced Phase Switching Prescaler -- Loop Filter with Capacitance Multiplier -- Other Building Blocks of PLL -- Prototype Measurement Results -- Conclusions.
In: Springer eBooksSummary: CMOS PLL Synthesizers: Analysis and Design presents both fundamentals and state of the art PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis are covered. A 16mW, 2.4GHz, sub-2V, S D fractional-N synthesizer prototype is implemented in 0.35mm CMOS. It features a high-speed and robust phase-switching prescaler, and a low-complexity and area-efficient loop capacitance mulitplier, which elegantly tackle speed and integration bottlenecks of PLL synthesizer. This book is useful as a PLL synthesizer manual for both academic researchers and industry design engineers.
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Frequency Synthesizer for Wireless Applications -- PLL Frequency Synthesizer -- ?? Fractional-N PLL Synthesizer -- Enhanced Phase Switching Prescaler -- Loop Filter with Capacitance Multiplier -- Other Building Blocks of PLL -- Prototype Measurement Results -- Conclusions.

CMOS PLL Synthesizers: Analysis and Design presents both fundamentals and state of the art PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis are covered. A 16mW, 2.4GHz, sub-2V, S D fractional-N synthesizer prototype is implemented in 0.35mm CMOS. It features a high-speed and robust phase-switching prescaler, and a low-complexity and area-efficient loop capacitance mulitplier, which elegantly tackle speed and integration bottlenecks of PLL synthesizer. This book is useful as a PLL synthesizer manual for both academic researchers and industry design engineers.

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