Normal view MARC view ISBD view

Partial Reconfiguration on FPGAs [electronic resource] : Architectures, Tools and Applications / by Dirk Koch.

By: Koch, Dirk [author.].
Contributor(s): SpringerLink (Online service).
Material type: materialTypeLabelBookSeries: Lecture Notes in Electrical Engineering: 153Publisher: New York, NY : Springer New York : Imprint: Springer, 2013Description: XVI, 296 p. online resource.Content type: text Media type: computer Carrier type: online resourceISBN: 9781461412250.Subject(s): Engineering | Computer science | Electronics | Systems engineering | Engineering | Circuits and Systems | Electronics and Microelectronics, Instrumentation | Processor ArchitecturesDDC classification: 621.3815 Online resources: Click here to access online
Contents:
Preemptive Hardware Task execution -- Intra-FPGA Communication Architectures for Reconfigurable Systems -- Building Partially Reconfigurable Systems – Methods and Tools -- Applications and Use Cases.
In: Springer eBooksSummary: This is the first book to focus on designing run-time reconfigurable systems on FPGAs, in order to gain resource and power efficiency, as well as to improve speed.  Case studies in partial reconfiguration guide readers through the FPGA jungle, straight toward a working system.  The discussion of partial reconfiguration is comprehensive and practical, with models introduced together with methods to implement efficiently the corresponding systems.  Coverage includes concepts for partial module integration and corresponding communication architectures, floorplanning of the on-FPGA resources, physical implementation aspects starting from constraining primitive placement and routing all the way down to the bitstream required to configure the FPGA, and verification of reconfigurable systems.   Provides comprehensive overview of state-of-the-art partial run-time reconfiguration techniques, including architectures, methods, and tools; Focuses on real applications that will benefit from partial reconfiguration;   Describes methods and tools to implement efficient, reconfigurable systems that can substantially improve cost, power consumption, or speed (throughput/latency); Includes practical use-cases that act as design patterns for a wide range of applications.  
Tags from this library: No tags from this library for this title. Log in to add tags.
    average rating: 0.0 (0 votes)
No physical items for this record

Preemptive Hardware Task execution -- Intra-FPGA Communication Architectures for Reconfigurable Systems -- Building Partially Reconfigurable Systems – Methods and Tools -- Applications and Use Cases.

This is the first book to focus on designing run-time reconfigurable systems on FPGAs, in order to gain resource and power efficiency, as well as to improve speed.  Case studies in partial reconfiguration guide readers through the FPGA jungle, straight toward a working system.  The discussion of partial reconfiguration is comprehensive and practical, with models introduced together with methods to implement efficiently the corresponding systems.  Coverage includes concepts for partial module integration and corresponding communication architectures, floorplanning of the on-FPGA resources, physical implementation aspects starting from constraining primitive placement and routing all the way down to the bitstream required to configure the FPGA, and verification of reconfigurable systems.   Provides comprehensive overview of state-of-the-art partial run-time reconfiguration techniques, including architectures, methods, and tools; Focuses on real applications that will benefit from partial reconfiguration;   Describes methods and tools to implement efficient, reconfigurable systems that can substantially improve cost, power consumption, or speed (throughput/latency); Includes practical use-cases that act as design patterns for a wide range of applications.  

There are no comments for this item.

Log in to your account to post a comment.


Implemented and Maintained by Biju Patnaik Central Library.
For any Suggestions/Query Contact to library or Email: library@nitrkl.ac.in OR bpcl-cir@nitrkl.ac.in. Ph:91+6612462103
Website/OPAC best viewed in Mozilla Browser in 1366X768 Resolution.

Powered by Koha