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Functional Design Errors in Digital Circuits [electronic resource] : Diagnosis, Correction and Repair / by Kai-hui Chang, Igor L. Markov, Valeria Bertacco.

By: Chang, Kai-hui [author.].
Contributor(s): Markov, Igor L [author.] | Bertacco, Valeria [author.] | SpringerLink (Online service).
Material type: materialTypeLabelBookSeries: Lecture Notes in Electrical Engineering: 32Publisher: Dordrecht : Springer Netherlands, 2009Description: XXIV, 200 p. online resource.Content type: text Media type: computer Carrier type: online resourceISBN: 9781402093654.Subject(s): Engineering | Logic design | Computer aided design | Systems engineering | Engineering | Circuits and Systems | Computer-Aided Engineering (CAD, CAE) and Design | Logic DesignDDC classification: 621.3815 Online resources: Click here to access online
Contents:
Background and Prior Art -- Current Landscape in Design and Verification -- Finding Bugs and Repairing Circuits -- FogClear Methodologies and Theoretical Advances in Error Repair -- Circuit Design and Verification Methodologies -- Counterexample-Guided Error-Repair Framework -- Signature-Based Resynthesis Techniques -- Symmetry-Based Rewiring -- FogClear Components -- Bug Trace Minimization -- Functional Error Diagnosis and Correction -- Incremental Verification for Physical Synthesis -- Post-Silicon Debugging and Layout Repair -- Methodologies for Spare-Cell Insertion -- Conclusions.
In: Springer eBooksSummary: Due to the dramatic increase in design complexity, modern circuits are often produced with functional errors. While improvements in verification allow engineers to find more errors, fixing these errors remains a manual and challenging task. Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Level (RTL) all the way to the silicon die. In particular, this book describes: (1) techniques for bug trace minimization that simplify debugging; (2) an RTL error diagnosis method that identifies the root cause of errors directly; (3) a counterexample-guided error-repair framework to automatically fix errors in gate-level and RTL designs; (4) a symmetry-based rewiring technology for fixing electrical errors; (5) an incremental verification system for physical synthesis; and (6) an integrated framework for post-silicon debugging and layout repair. In addition, Functional Design Errors in Digital Circuits Diagnosis describes a comprehensive evaluation of spare-cell insertion methods. The solutions provided in this book can greatly reduce debugging effort, enhance design quality, and ultimately enable the design and manufacture of more reliable electronic devices.
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Background and Prior Art -- Current Landscape in Design and Verification -- Finding Bugs and Repairing Circuits -- FogClear Methodologies and Theoretical Advances in Error Repair -- Circuit Design and Verification Methodologies -- Counterexample-Guided Error-Repair Framework -- Signature-Based Resynthesis Techniques -- Symmetry-Based Rewiring -- FogClear Components -- Bug Trace Minimization -- Functional Error Diagnosis and Correction -- Incremental Verification for Physical Synthesis -- Post-Silicon Debugging and Layout Repair -- Methodologies for Spare-Cell Insertion -- Conclusions.

Due to the dramatic increase in design complexity, modern circuits are often produced with functional errors. While improvements in verification allow engineers to find more errors, fixing these errors remains a manual and challenging task. Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Level (RTL) all the way to the silicon die. In particular, this book describes: (1) techniques for bug trace minimization that simplify debugging; (2) an RTL error diagnosis method that identifies the root cause of errors directly; (3) a counterexample-guided error-repair framework to automatically fix errors in gate-level and RTL designs; (4) a symmetry-based rewiring technology for fixing electrical errors; (5) an incremental verification system for physical synthesis; and (6) an integrated framework for post-silicon debugging and layout repair. In addition, Functional Design Errors in Digital Circuits Diagnosis describes a comprehensive evaluation of spare-cell insertion methods. The solutions provided in this book can greatly reduce debugging effort, enhance design quality, and ultimately enable the design and manufacture of more reliable electronic devices.

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